Am 08.09.23 um 10:46 schrieb Yifan Zhang:
dropping bit 31:4 of paget table base is wrong, it makes page table
base points to wrong address if phys addr is beyond 64GB; dropping
page_table_start/end bit 31:4 is unnecessary since dcn20_vmid_setup
will do that.

Signed-off-by: Yifan Zhang <yifan1.zh...@amd.com>

Good catch, one nit pick below.

With out without that Acked-by: Christian König <christian.koe...@amd.com>

---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1bb1a394f55f..f8bf04fcceac 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1283,11 +1283,11 @@ static void mmhub_read_system_context(struct 
amdgpu_device *adev, struct dc_phy_
pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); - page_table_start.high_part = (u32)(adev->gmc.gart_start >> 44) & 0xF;
+       page_table_start.high_part = (u32)(adev->gmc.gart_start >> 44);
        page_table_start.low_part = (u32)(adev->gmc.gart_start >> 12);
-       page_table_end.high_part = (u32)(adev->gmc.gart_end >> 44) & 0xF;
+       page_table_end.high_part = (u32)(adev->gmc.gart_end >> 44);
        page_table_end.low_part = (u32)(adev->gmc.gart_end >> 12);

While at it you might want to change those to use AMDGPU_GPU_PAGE_SHIFT and the lower_32_bits() and upper_32_bits() functions instead.

Something like:

page_table_end.high_part = upper_32_bits(adev->gmc.gart_end >> AMDGPU_GPU_PAGE_SHIFT); page_table_end.low_part = lower_32_bits(adev->gmc.gart_end >> AMDGPU_GPU_PAGE_SHIFT);

Not a must have, but might be a bit cleaner.

Regards,
Christian.

-       page_table_base.high_part = upper_32_bits(pt_base) & 0xF;
+       page_table_base.high_part = upper_32_bits(pt_base);
        page_table_base.low_part = lower_32_bits(pt_base);
pa_config->system_aperture.start_addr = (uint64_t)logical_addr_low << 18;

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