Am 15.09.23 um 16:53 schrieb Felix Kuehling:
On 2023-09-15 2:50, Christian König wrote:
Am 15.09.23 um 04:52 schrieb YuBiao Wang:
Directly use tbo's start address will miss the domain start offset.
Need
to use gpu_offset instead.
Signed-off-by: YuBiao Wang <yubiao.w...@amd.com>
Felix and/or Shashank should probably take a look as well, but of
hand that looks like the correct fix.
Looks reasonable to me. Why did this not cause problems before? Are we
just lucky that the domain start offset is 0 on the GPUs we've tested
so far?
By coincident the GART ended up being placed at 0 before. Now Alex has
to move it to work around other issues.
Regards,
Christian.
Regards,
Felix
Reviewed-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 77159b03a422..36e7171ad9a7 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -216,7 +216,7 @@ static int add_queue_mes(struct
device_queue_manager *dqm, struct queue *q,
if (q->wptr_bo) {
wptr_addr_off = (uint64_t)q->properties.write_ptr &
(PAGE_SIZE - 1);
- queue_input.wptr_mc_addr =
((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) +
wptr_addr_off;
+ queue_input.wptr_mc_addr = amdgpu_bo_gpu_offset(q->wptr_bo)
+ wptr_addr_off;
}
queue_input.is_kfd_process = 1;
