Re: [PATCH 2/3] drm/amdgpu/gmc: add a flag to disable AGP

Thu, 21 Sep 2023 00:53:48 -0700 

Am 20.09.23 um 19:58 schrieb Alex Deucher:

Allows the driver to disable the AGP aperture when
it's not needed.  Program AGP explictly for all asics,
but set the flag to align with previous behavior.  No
functional change.

v2: rework patch
v3: fix broken rebase

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c           | 2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h           | 2 ++
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c            | 2 ++
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c            | 2 ++
  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c             | 6 ++++--
  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c             | 6 ++++--
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c             | 6 ++++--
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c             | 3 ++-
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
  9 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index c7793db6d098..fc1a585d05bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -315,7 +315,7 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, 
struct amdgpu_gmc *mc)
        const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1);
        u64 size_af, size_bf;
- if (amdgpu_sriov_vf(adev)) { 
+       if (mc->disable_agp) {
                mc->agp_start = 0xffffffffffff;
                mc->agp_end = 0x0;
                mc->agp_size = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index fdc25cd559b6..d3b014b84fa9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -333,6 +333,8 @@ struct amdgpu_gmc {
        u64 MC_VM_MX_L1_TLB_CNTL;
u64 noretry_flags; 
+
+       bool disable_agp;
I would still rather have adev->gmc.agp_start and adev->gmc.agp_end and initialized to valid default values and then never call amdgpu_gmc_agp_location().
This here basically just tells the function to not do anything, so we could rather not call it in the first place. 

Regards,
Christian.


  };
#define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid), (vmhub), (type))) 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index e582073b57c8..2923007847bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -842,6 +842,8 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
                adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
        }
+ if (amdgpu_sriov_vf(adev)) 
+               adev->gmc.disable_agp = true;
        gmc_v10_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 69f65e9c4f93..28dc08fe542b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -741,6 +741,8 @@ static int gmc_v11_0_mc_init(struct amdgpu_device *adev)
        else
                adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
+ if (amdgpu_sriov_vf(adev)) 
+               adev->gmc.disable_agp = true;
        gmc_v11_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 07579fa26fa3..a65118926ed7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -213,6 +213,7 @@ static void gmc_v6_0_vram_gtt_location(struct amdgpu_device 
*adev,
amdgpu_gmc_vram_location(adev, mc, base); 
        amdgpu_gmc_gart_location(adev, mc);
+       amdgpu_gmc_agp_location(adev, mc);
  }
static void gmc_v6_0_mc_program(struct amdgpu_device *adev) 
@@ -253,8 +254,8 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
if (gmc_v6_0_wait_for_idle((void *)adev)) 
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
@@ -339,6 +340,7 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
        }
adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; 
+       adev->gmc.disable_agp = true;
        gmc_v6_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index e77e5593e1ab..680c7bc58c85 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -241,6 +241,7 @@ static void gmc_v7_0_vram_gtt_location(struct amdgpu_device 
*adev,
amdgpu_gmc_vram_location(adev, mc, base); 
        amdgpu_gmc_gart_location(adev, mc);
+       amdgpu_gmc_agp_location(adev, mc);
  }
/** 
@@ -288,8 +289,8 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
        if (gmc_v7_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
@@ -406,6 +407,7 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev) 
        }
adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; 
+       adev->gmc.disable_agp = true;
        gmc_v7_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 6acf649469dd..1576d22c8197 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -415,6 +415,7 @@ static void gmc_v8_0_vram_gtt_location(struct amdgpu_device 
*adev,
amdgpu_gmc_vram_location(adev, mc, base); 
        amdgpu_gmc_gart_location(adev, mc);
+       amdgpu_gmc_agp_location(adev, mc);
  }
/** 
@@ -473,8 +474,8 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
        }
WREG32(mmMC_VM_AGP_BASE, 0); 
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
        if (gmc_v8_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
@@ -596,6 +597,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev) 
        }
adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; 
+       adev->gmc.disable_agp = true;
        gmc_v8_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 2936a0fb7527..83a4e293ec4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1788,7 +1788,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
        }
adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; 
-
+       if (amdgpu_sriov_vf(adev))
+               adev->gmc.disable_agp = true;
        gmc_v9_0_vram_gtt_location(adev, &adev->gmc);
return 0; 
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2e4a8bdbf50e..c2cb4b4cd2d7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1255,7 +1255,7 @@ static void mmhub_read_system_context(struct 
amdgpu_device *adev, struct dc_phy_
        agp_top = adev->gmc.agp_end >> 24;
/* AGP aperture is disabled */ 
-       if (agp_bot == agp_top) {
+       if (agp_bot > agp_top) {
                logical_addr_low = adev->gmc.fb_start >> 18;
                if (adev->apu_flags & AMD_APU_IS_RAVEN2)
                        /*

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