This is workaround due to ring test failed during ras
do gpu recovery for aqua vanjaram.

Signed-off-by: Stanley.Yang <stanley.y...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index fbfe0a1c4b19..9fff58d073a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -248,10 +248,16 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring 
*ring)
 {
        uint32_t scratch_reg0_offset, xcc_offset;
        struct amdgpu_device *adev = ring->adev;
+       struct amdgpu_ras *ras;
        uint32_t tmp = 0;
        unsigned i;
        int r;
 
+       /* This is workaround: ring test failed during ras recovery */
+       ras = amdgpu_ras_get_context(adev);
+       if (ras && atomic_read(&ras->in_recovery))
+               return 0;
+
        /* Use register offset which is local to XCC in the packet */
        xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);
        scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), 
regSCRATCH_REG0);
-- 
2.25.1

Reply via email to