[AMD Official Use Only - General] Reviewed-by: Asad Kamal <[email protected]>
Thanks & Regards Asad -----Original Message----- From: Zhang, Hawking <[email protected]> Sent: Friday, October 20, 2023 12:36 PM To: Lazar, Lijo <[email protected]>; [email protected] Cc: Deucher, Alexander <[email protected]>; Kamal, Asad <[email protected]>; Ma, Le <[email protected]> Subject: RE: [PATCH] drm/amdgpu: Add a read to GFX v9.4.3 ring test [AMD Official Use Only - General] Acked-by: Hawking Zhang <[email protected]> Regards, Hawking -----Original Message----- From: Lazar, Lijo <[email protected]> Sent: Friday, October 20, 2023 15:02 To: [email protected] Cc: Zhang, Hawking <[email protected]>; Deucher, Alexander <[email protected]>; Kamal, Asad <[email protected]>; Ma, Le <[email protected]> Subject: [PATCH] drm/amdgpu: Add a read to GFX v9.4.3 ring test Issue a read to confirm the register write before ringing doorbell. With multiple XCCs there is chance for race condition. Signed-off-by: Lijo Lazar <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index a1c2c952d882..5861e4d0eda9 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -256,6 +256,7 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring *ring) xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0); scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0); WREG32(scratch_reg0_offset, 0xCAFEDEAD); + tmp = RREG32(scratch_reg0_offset); r = amdgpu_ring_alloc(ring, 3); if (r) -- 2.25.1
