Hi Marcin,
On 10/03/2010 12:19 AM, Marcin Cieslak wrote:
>>> Erich Waelde<[email protected]> wrote:
>>
>> The bit $10, which is apparently not set, ist the MSTR bit. That fits
>> the symtoms I'm seeing: "spirw" (available in core/words/spirw.asm)
>> never returns, because SPIF in register SPSR is never set. No wonder,
>> if we are not in master mode to begin with. The bit-bang version
>> never looks at SPSR and SPCR.
>
> I've had this when some other device on the SPI bus was pulling /SS low
> and thus forced us to be slave.
Turn's out that /SS is driven low _internally_!!! Who would have thougt ...
So the fix is easy:
> PORTB 4 portpin: /ss
ok
> /ss high \ turn on internal pullup
ok
> SPCR c@ .
0 ok
> $53 SPCR c!
ok
> SPCR c@ .
53 ok
>
THEN after initializing everything as before, talking to the maxim 186 works:
> @ch3 decimal u.
1816 ok
Thanks!
Erich
--- complete programm for reference
--------------------------------------------------------------
\ 2009-06-01 EW 33_spi/main2.fs
\ spi, hw interface
\ 2010-10-03 EW finally fixed: internal pullup on /ss
\ "><spi" can now be exchanged to "spirw" found in core/words/spirw.asm
marker --start--
\ include devices/atmega32.frt \ register definitions
$3A constant DDRA \ Port A Data Direction Register
$39 constant PINA \ Port A Input Pins
$3B constant PORTA \ Port A Data Register
\ PORTB
$37 constant DDRB \ Port B Data Direction Register
$36 constant PINB \ Port B Input Pins
$38 constant PORTB \ Port B Data Register
\ PORTC
$34 constant DDRC \ Port C Data Direction Register
$33 constant PINC \ Port C Input Pins
$35 constant PORTC \ Port C Data Register
\ PORTD
$31 constant DDRD \ Port D Data Direction Register
$30 constant PIND \ Port D Input Pins
$32 constant PORTD \ Port D Data Register
\ SPI
$2D constant SPCR \ SPI Control Register
$2F constant SPDR \ SPI Data Register
$2E constant SPSR \ SPI Status Register
include lib/bitnames.frt \ port_pin: high low pin_{out,in}put
\ ----------------------------------------------------------
\ pin layout, bus addresses, IDs ...
\ --- pins:
PORTA 0 portpin: led0 \ .
\ ----------------------------------------------------------
\ include files ... or words stolen from there :-)
: ms ( n -- ) 0 do 1ms loop ;
\ ----------------------------------------------------------
\ include ewlib/spi.fs
PORTB 4 portpin: /ss \ not used as select here!
PORTB 5 portpin: _mosi
PORTB 6 portpin: _miso
PORTB 7 portpin: _clk
: spi.init ( -- )
/ss high \ activate pullup, otherwise master mode will not work!
_mosi high _mosi pin_output
\ _miso high _miso pin_input \ ??? muß das highZ sein???
_clk low _clk pin_output
$53 SPCR c!
;
\ transfer 1 byte
: ><spi ( x -- x' )
SPDR c!
begin SPSR c@ $80 and until
SPDR c@
;
\ transfer 1 cell
: 2><spi
dup 8 rshift ><spi
swap ><spi
swap 8 lshift +
;
\ transfer N bytes
\ uses stack as temp.array! Highly deprecated!
\ using "roll" would be cleaner
: @spn ( x0 .. xN-1 i -- x0 .. xN-1 xi )
1+ cells sp@ + @ ;
: !spn ( x0 .. xi .. xN-1 yi i -- x0 .. yi .. xN-1 )
2 + cells sp@ + ! ;
: N><spi ( x0 .. xN-1 N -- y0 .. yN-1 )
1- 0 swap do
i @spn
><spi
i !spn
-1 +loop ;
\ ----------------------------------------------------------
\ include spi-maxim-186.fs
\ control byte:
\ channel 0, unipolar, single ended, external clock -> $8f
PORTC 2 portpin: _sel
: adc.init
-jtag
_sel high _sel pin_output
;
\ 1 clock cycle is lost; we should wait for SSTRB to become high
\ instead. However, we are slow enough. So "3 rshift" not "4 rshift"
: @adc.ch3 ( -- value )
_sel low
$df ><spi drop
$00 ><spi $00 ><spi
_sel high
swap 8 lshift + 3 rshift
;
: @ch3 ( -- value )
_sel low
$df $00 $00 3 N><spi
_sel high
swap 8 lshift + 3 rshift
swap drop
;
\ ----------------------------------------------------------
\ main
decimal
: io.init
led0 high led0 pin_output
;
: loop.init
io.init
spi.init
adc.init
;
: run
decimal
loop.init
begin
led0 low
@ch3 cr .
500 ms
led0 high
500 ms
key? until
;
------------------------------------------------------------------------------
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