Investigating the problem of the failed simulation of Amforth in simavr I have added printing of every read and write operation to the FLASH and to the EEPROM. Afterwards I've found, that when I define a very simple word:
> : test 12 ; ok > It gives the following sequence of writes in the simavr (I attach the whole dump in gzipped format, together with bzipped .lst file from compilation, so it is possible to identify addresses): AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ff04 AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 87 eeprom read 0003 : 0d eeprom write 0002 <- 88 eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:6574 AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 88 eeprom read 0003 : 0d eeprom write 0002 <- 89 eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:7473 AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 89 eeprom read 0003 : 0d eeprom write 0002 <- 8a eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:3bb6 AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 8a eeprom read 0003 : 0d eeprom write 0002 <- 8b eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 8b eeprom read 0003 : 0d eeprom write 0002 <- 8c eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:3837 AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 8c eeprom read 0003 : 0d eeprom write 0002 <- 8d eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:000c AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff eeprom read 0002 : 8d eeprom read 0003 : 0d eeprom write 0002 <- 8e eeprom write 0003 <- 0d [...] AVR_IOCTL_FLASH_SPM 01 Z:1b00 R01:ff01 AVR_IOCTL_FLASH_SPM 01 Z:1b02 R01:003f AVR_IOCTL_FLASH_SPM 01 Z:1b04 R01:0d73 AVR_IOCTL_FLASH_SPM 01 Z:1b06 R01:3800 AVR_IOCTL_FLASH_SPM 01 Z:1b08 R01:3870 AVR_IOCTL_FLASH_SPM 01 Z:1b0a R01:03be AVR_IOCTL_FLASH_SPM 01 Z:1b0c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b0e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b10 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b12 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b14 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b16 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b18 R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1a R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b1c R01:381a AVR_IOCTL_FLASH_SPM 01 Z:1b1e R01:ffff AVR_IOCTL_FLASH_SPM 01 Z:1b20 R01:ffff [...] eeprom read 0002 : 8e eeprom read 0003 : 0d eeprom write 0002 <- 8f eeprom write 0003 <- 0d [...] What's absolutely strange to me, is that definition of single word causes eeprom cells 2 and 3 to be rewritten 8 times (?!). It will result in fast wear of the EEPROM. Maybe the value stored in cells 2 and 3 of the EEPROM shpuld be stored in RAM (and recreated after power up by scanning of the FLASH? It should be relatively easy to do?) Additionally (and this is probably the simavr's bug) when new words are written, the previoulsy written values are again 0xffff. Regards, Wojtek ------------------------------------------------------------------------------ DreamFactory - Open Source REST & JSON Services for HTML5 & Native Apps OAuth, Users, Roles, SQL, NoSQL, BLOB Storage and External API Access Free app hosting. Or install the open source package on any LAMP server. Sign up and see examples for AngularJS, jQuery, Sencha Touch and Native! http://pubads.g.doubleclick.net/gampad/clk?id=63469471&iu=/4140/ostg.clktrk _______________________________________________ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
