On Wed, 17 Oct 2018 13:27:09 +0100
Tristan Williams <h...@tjnw.co.uk> wrote:

> On 17Oct18 10:25, Martin Nicholas via Amforth-devel wrote:
> > Hi,
> > 
> > I think that @ ! +! 2@ 2! d+! should disable interrupts on the AVR.
> > Although it's possible to code around a variable being changed by an
> > interrupt (using C@ C! for example), the 16-bit counter registers
> > can't be dealt with in a similar way. Section 17.3 of the datasheet
> > "Accessing 16-bit Registers" deals with all this. @ and ! do do the
> > byte accesses in the right order, but an interrupt using the 16-bit
> > registers associated with a particular counter will overwrite the
> > "TEMP (8-bit)" register (see Figure 17-4).
> > 
> > Cheers!
> > 
> >   
> 
> Hello Martin,
> 
> This page http://amforth.sourceforge.net/TG/AVR8.html sets out how
> AmForth handles interrupts and I think it is relevant to your post. 
> 
> Earlier this year I wrote some forth[1] that used the word 1ms and it
> was not running as I expected. I had not realised that the execution
> of AmForth words written in assembler would not be interrupted. @ ! +!
> are assembler words and so will not be interrupted.
> 
> Tristan
> 
> [1]
> https://sourceforge.net/p/amforth/mailman/amforth-devel/?viewmonth=201806
> 

No, thie problem with 1ms is specific to 1ms. I suspect the tight inner
loop is uninterruptable. It is:
> sbiw  Z, 1
> brne  pc-1

Interrupts are enabled at all times (by APPLTURNKEY) unless you
specifically disable them.

Looking at the vanilla build at:
amforth-6.7/appl/template/template.lst
These words enable interrupts: +INT APPLTURNKEY.
These disable: -INT.
These temporarily disable interrupts: RP! !E @E (!I-NRWW). They are
re-enabled before exit.
That's it. Search for "cli" and "sei".

When I have time I'll test my theory about 1ms. Atmel documentation is
no help on this, although there are dark hints in the documentation
for BRNE.

Confirm interrupt status with:
"hex 5f c@ ."

Cheers!

-- 
Regards,

Martin Nicholas.

E-mail: m...@mgn.org.uk.


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