Forgot to mention. When testing the riscv assembler using amForths t{ ...
}t from tester it was not showing errors, even the obvious ones. Even tried
these words using gForth and esp32Forth and they didn't work properly
(something to do with being 32 bit?) even though they work for Avr8
amForth. What worked for me was redefining these words and just comparing
the outputs (see below).
: t{ .s ;
: }t - . .s ;
: => dup . ;
t{ a0 a1 $FFF addi $0FF58513 => }t <0> F0000000 <0> ok / was incorrect -
by showing difference & number stack elements before & after
t{ a0 a1 $FFF addi $FFF58513 => }t <0> 0 <0> ok / was correct - by
showing 0 difference & number stack elements before & after
On Sat, Jan 3, 2026 at 4:21 PM John Sarabacha <[email protected]> wrote:
> Hello everyone,
> Based on the information I gleaned so far and using the existing amForth
> Avr8 assembler as a starting point it is possible to generate 32 bit RISCV
> machine instructions to sram memory using amForth RISCV words. A starting
> point prototype assembler for RISCV easily expandable (only a few base
> instructions so far) and supporting core.s and end-core.s word files were
> created so far - still needs to be tested thoroughly.
> As a priority work has shifted to interfacing forth to an expert system
> called CLIPS.
> Looking to use amForth on RISCV (ESP32C3/ESP32C6/ESP32N2 & CH32) for this
> interface to CLIPS for networked machine learning (AI). The networking is
> not just Wifi and bluetooth but also RS485 (there is already an example of
> this in the existing distribution of amForth for Avr8).
>
> Regards,
> John S
>
>
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