Benchmarks on this later, when they become available.

On Wed, Jan 14, 2026 at 1:56 PM John Sarabacha <[email protected]> wrote:

> A true JIT compiler is feasible for amForth (riscv & arm). This will give
> amForth a performance boost comparable to C compiled code, maybe even
> better.  C compiled code needs to reside in flash memory unless it is
> copied and relocated to sram. The JIT compiler resides in flash but can
> compile directly to sram. The amForth core words (forth assembler
> instructions) can serve as the DNA words  for the compiled programs in
> sram. The JIT compiler can be invoked in interpreter mode to compile new
> words that use existing DNA words (by copying the existing previously
> assembled machine instructions for the core word) directly to sram for each
> word involved (eg. shared words - that have a sequence of  words). The
> advantage here is having an on board JIT compiler that can generate
> (sequence) code without needing the ITC to mediate execution and running in
> sram. C implementations of forth would have more trouble doing this than
> amForth (being based on assembler code).
> This would be a major performance boost since the majority of amForth's
> core words have only a few machine instructions (a lot only have one),
> most of the time the ITC is consuming the majority of the instruction
> cycles for word execution.
>
> Regards,
> John S
>

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