For those interested in this topic and some history (ITC and DTC), These concepts are not new, they were used way back in the '80s in scada software, used to monitor and control natural gas pipeline compressor stations across Canada (100s of them). Macros (as in macros.s) were used to create dictionary type (IO) structures on hard disks and magnetic tape cartridges (which loaded into memory). Usarts were used in series to communicate using a direct phone line across Canada to DEC LSI-11 computers (Charles Moore is probably familiar with them). Instead of forth, rsx11-m/s operating systems (with 16 bit cpus) were used. The scada software was using a combination of ITC and DTC written in macro assembler. As in forth this software used keywords (interactively) to drive the color video displays (monitors) at the main control center and keywords (turnkey) that provided the packing and unpacking of communication data packets travelling on the direct phone line. All in real-time. My role back then was independent software analyst/programmer (consultant). Although this implementation (for RISCV) is still experimental, the concepts have already been proven. To-day we have 32bit mcus, more sram than was used back then and faster flash instead of hard disks and magnetic tapes.
Yes this is still experimental. Regards, John S On Sat, Jan 17, 2026 at 12:34 PM John Sarabacha <[email protected]> wrote: > Also finding that ITC and DTC can be intermixed within shared\words\*.s > by just leaving NEXT macro as the default for ITC and adding NEXT_DTC for > DTC. > The NEXT_DTC and DTC_MODEL macros being added to macros.s. In the > shared/words/*.s files > the default .word XT_(primative name) still being the default and using > the macro DTC_MODEL to provide DTC support within the same *.s file > intermixed with ITC .word XT_(primative name). > Again this is still experimental. > > Regards, > John S > > On Sat, Jan 17, 2026 at 11:57 AM John Sarabacha <[email protected]> > wrote: > >> Hi All, >> The code execution model of amForth can be easily changed to >> support ITC (Indirect Threading Code) and DTC (Direct Threading Code). >> On RISCV the DTC model takes advantage of a call and return using a >> register to provide the return address which uses fewer instruction cycles >> than the ITC. >> This has the advantage of faster execution and more compact compiled >> words (shared\words) the dictionary and sram. The changes are almost >> trivial, the NEXT macro in macros.s can have a conditional assembly of j >> (jump for ITC) or ret (return for DTC). >> Also an additional macro in macro.s which conditionally assembles to >> .word XT_(primative name) (for ITC) or a call PFA_(primative name) (for >> DTC). This new macro used within the shared\words\*.s files and it would >> prefix the primitive word name with XT_ (for ITC) or PFA_ (for DTC). >> Again this is still experimental. >> >> Regards, >> John S >> >> >> > _______________________________________________ Amforth-devel mailing list for http://amforth.sf.net/ [email protected] https://lists.sourceforge.net/lists/listinfo/amforth-devel
