*Urgent Requirement for Position : FPGA Engineer* *Client : Intel*
*Location : Arizona -Chandler* *Requirements:* - FPGA Design and Debug Leads (2 Senior Engineers) o 10+ yrs of experience o Proven track record of FPGA/ASIC complex SoC design using Verilog/VHDL o Experience on multi FPGA design is preferable o Familiarity with ARM, ATOM based SoC architecture o Xilinx platform and tools o Partitioning, coding, debugging, synthesis, timing analysis, programming, optimization • FPGA Validation (1 Senior Engineer;) o 10+ yrs of experience o Proven track record of complex FPGA/ASIC verification/validation o Ability to develop validation strategy and plan for multi FPGA designs o Experience in validation of ARM, ATOM based SoC architecture o Xilinx platform and tools • FPGA Validation and Debug (1 Mid level engineer) o 7+ yrs of experience o Proven track record of FPGA/ASIC verification/validation o Ability to develop and run test cases o Experience in validation of ARM, ATOM based SoC architecture o Xilinx platform and tools *TOTAL EXPERIENCE :* *RELEVANT EXPERIENCE :* *OFFICIAL NOTICE PERIOD :* *CURRENT RATE PER HOUR :* *VISA STATUS :* *EMAIL ID :-* *[email protected] <[email protected]>* -- You received this message because you are subscribed to the Google Groups "Android Developers" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at https://groups.google.com/group/android-developers. To view this discussion on the web visit https://groups.google.com/d/msgid/android-developers/23f91569-612f-4a38-9a70-d0920f976092%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
