SAPPHIRE_CPLD_BASE and TROUT_CPLD_BASE were inside the range of memory
allocated by the kernel for virtual mappings, causing the IO mapping
to be overwritten if the kernel allocated the page.

To reproduce, allocate then deallocate all kernel memory.  The mapping
will be removed and the kernel will crash when any of the IO memory is
accessed (e.g. for changing phone brightness).

Change-Id: I49b3b8af5257ba77998e03d0ecff0f909ddc752c
---
 arch/arm/mach-msm/board-sapphire.h |    2 +-
 arch/arm/mach-msm/board-trout.h    |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-msm/board-sapphire.h 
b/arch/arm/mach-msm/board-sapphire.h
index 3327dfe..36daa42 100644
--- a/arch/arm/mach-msm/board-sapphire.h
+++ b/arch/arm/mach-msm/board-sapphire.h
@@ -106,7 +106,7 @@
 ** Sapphire Altera CPLD can keep the registers value and
 ** doesn't need a shadow to backup.
 **/
-#define SAPPHIRE_CPLD_BASE   0xE8100000        /* VA */
+#define SAPPHIRE_CPLD_BASE   0xFA300000        /* VA */
 #define SAPPHIRE_CPLD_START  0x98000000        /* PA */
 #define SAPPHIRE_CPLD_SIZE   SZ_4K
 
diff --git a/arch/arm/mach-msm/board-trout.h b/arch/arm/mach-msm/board-trout.h
index 308c4df..b6e1fad 100644
--- a/arch/arm/mach-msm/board-trout.h
+++ b/arch/arm/mach-msm/board-trout.h
@@ -58,7 +58,7 @@
 #define TROUT_4_TP_LS_EN    19
 #define TROUT_5_TP_LS_EN    1
 
-#define TROUT_CPLD_BASE   0xE8100000
+#define TROUT_CPLD_BASE   0xFA300000
 #define TROUT_CPLD_START  0x98000000
 #define TROUT_CPLD_SIZE   SZ_4K
 
-- 
1.7.1

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