On Thu, Nov 14, 2013 at 5:33 PM, Preethi Natarajan <[email protected]>wrote: > > > Just pointing out the evidence here -- > http://www.ietf.org/proceedings/86/slides/slides-86-iccrg-5.pdf > > The slides contain preliminary results from DC scenarios, showing PIE's > parameters and adaptability to DC scenarios. Thank god for the IETF > archives :) > > Hi Preethi,
In these simulations what was the buffer size used? From my read, it looks like the setup had ~400 KB per port before any marking/discarding would take place. This is significantly more than what is available in top-of-the-rack switches used in many data centers. This should give you an idea of the kind of buffering that is actually available. As port-counts go up, the amount of buffering per port goes down. http://people.ucsc.edu/~warner/buffer.html For the simulations to be relevant for such switches, they would have to be done with significantly smaller buffer sizes. The sizing gets even worse when we consider there may be multiple priorities and some of those may be lossless (requiring dedicated buffers be set aside for them). Anoop
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