Update of /cvsroot/arcem/arcem
In directory sfp-cvs-1.v30.ch3.sourceforge.com:/tmp/cvs-serv19227
Modified Files:
armemu.c armemuinstr.c
Log Message:
armemu.c, armemuinstr.c - Make SWP abort on ARM2. Chances are the other other
instructions in these encoding ranges should abort as well (on at least some
architectures), but without hardware to test on SWP is the only one I can be
fairly certain of that's meant to abort
Index: armemu.c
===================================================================
RCS file: /cvsroot/arcem/arcem/armemu.c,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- armemu.c 21 Oct 2012 16:59:31 -0000 1.19
+++ armemu.c 26 Apr 2016 00:53:57 -0000 1.20
@@ -22,6 +22,7 @@
#include <time.h>
#include "prof.h"
#include "arch/archio.h"
+#include "arch/ArcemConfig.h"
#include "ControlPane.h"
ARMul_State statestr;
Index: armemuinstr.c
===================================================================
RCS file: /cvsroot/arcem/arcem/armemuinstr.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- armemuinstr.c 12 May 2012 17:34:51 -0000 1.3
+++ armemuinstr.c 26 Apr 2016 00:53:57 -0000 1.4
@@ -344,6 +344,11 @@
EMFUNC_CONDTEST
if (BITS(4,11) == 9) { /* SWP */
+ if (Processor_ARM2 == hArcemConfig.eProcessor) {
+ ARMul_UndefInstr(state,instr);
+ return;
+ }
+
temp = LHS;
BUSUSEDINCPCS;
@@ -395,6 +400,11 @@
EMFUNC_CONDTEST
if (BITS(4,11) == 9) { /* SWP */
+ if (Processor_ARM2 == hArcemConfig.eProcessor) {
+ ARMul_UndefInstr(state,instr);
+ return;
+ }
+
temp = LHS;
BUSUSEDINCPCS;
if (ADDREXCEPT(temp)) {
@@ -524,6 +534,11 @@
EMFUNC_CONDTEST
if (BITS(4,11) == 9) { /* SWP */
+ if (Processor_ARM2 == hArcemConfig.eProcessor) {
+ ARMul_UndefInstr(state,instr);
+ return;
+ }
+
temp = LHS;
BUSUSEDINCPCS;
if (ADDREXCEPT(temp)) {
@@ -570,6 +585,11 @@
EMFUNC_CONDTEST
if (BITS(4,11) == 9) { /* SWP */
+ if (Processor_ARM2 == hArcemConfig.eProcessor) {
+ ARMul_UndefInstr(state,instr);
+ return;
+ }
+
temp = LHS;
BUSUSEDINCPCS;
if (ADDREXCEPT(temp)) {
------------------------------------------------------------------------------
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