Hi Dave,

> This took me a few minutes to remember - the simple answer is it
> avoids it for everything internal.
> 
> The memory is represented by a *word* array (MEMC.PhysRam) that gets
> accessed by normal C array operations and is thus held in host
> endianness.

Yep, saw that bit.

> Byte accesses are done by reading the word and shifting and masking;
> and bit order is always constant in C (see PutVal in arch/armarc.c and
> look for the bNw code to see where it masks).

Ah, got it.  bNw meaning `byte not word'.

> The only place this doesn't hold is where you need to dump something
> to the video or else to the OS.

I'd found the video stuff when looking for the LDR/LDRB stuff.

> Even the code to read the ROM in (armarc.c ARMul_MemoryInit) doesn't
> need to know host endianness; it just reads 4 bytes in, assembles them
> as a word using C shifts.

Yep, I see.

Many thanks,


Ralph.




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