On 06/18/2017 09:39 PM, Luke Kenneth Casson Leighton wrote: > On Mon, Jun 19, 2017 at 2:06 AM, zap <[email protected]> wrote: > >> According to the lowrisc website though, you can make a 64 bit processor >> if you so choose though. > yes. the minioncores would be on the same bus, not requiring any > kind of cache coherency with either each other or with the main 64-bit > CPU(s), either doing DMA writes (on their own) or responding to bus > memory reads/writes in order appear as memory-addressable peripherals. > >> I am sure you know this, but I just hope you understand that better >> possibilities exist. ;) > you may be misunderstanding that the purpose of 32-bit minion cores > is *in addition* to there being one or more main processor(s) which > are SMP or NUMA, which themselves have a bus width (32, 64, 128 bit) > that has absolutely nothing whatsoever to do with the minion-cores > being 32-bit. > >> I Wonder when they are going to crowdfund though... > i get the general impression that they're quite happy to focus on > development as opposed to raising funds to create an actual processor. > each task requires different skills, time and effort. if the team > focussed on crowdfunding that would be a serious distraction from > their development efforts. > > this therefore is an opportunity to create a crowd-funded processor > which utilises their expertise. the one main thing which i could > really do with is a DDR or other high-speed memory interface that is > proven... and compatible with the GPL.
I guess I misunderstood then on both counts. well this is odd. xD > l. > > _______________________________________________ > arm-netbook mailing list [email protected] > http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook > Send large attachments to [email protected] _______________________________________________ arm-netbook mailing list [email protected] http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook Send large attachments to [email protected]
