On Thu, Mar 25, 2021 at 12:54:02AM +1100, Jonathan Gray wrote:
> On Wed, Mar 24, 2021 at 11:14:43PM +1100, Jonathan Gray wrote:
> > On Mon, Mar 22, 2021 at 07:00:06PM -0500, Jordon wrote:
> > > 6.6 was the last release that works. 6.7 and 6.8 throw an input/output
> > > error when it tries to create the partitions (right after you choose
> > > ‘(W)hole disk’).
> > >
> > > Am I the only person to try installing it to onboard storage in the last
> > > year? Or am I doing something wrong?
> >
> > The workaround to limit emmc bus width is not done after the device tree
> > changes which removed the "ti,hwmods" property. While reads work
> > without this writes give an error.
> >
> > After adding calls to enable clocks emmc writes work without limiting
> > bus width.
>
> updated diff with other ti,hwmods use
Looking at the device tree I see the clocks should be enabled by
omsysc(4) already. I can't trigger emmc errors on writes at the moment
even after dropping the diff so I'm not sure what is going on.
Not handling vmmc-supply/regulator enable?
>
> Index: omgpio.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/armv7/omap/omgpio.c,v
> retrieving revision 1.12
> diff -u -p -r1.12 omgpio.c
> --- omgpio.c 10 Apr 2020 22:02:45 -0000 1.12
> +++ omgpio.c 24 Mar 2021 13:46:44 -0000
> @@ -17,26 +17,21 @@
>
> #include <sys/param.h>
> #include <sys/systm.h>
> -#include <sys/queue.h>
> #include <sys/device.h>
> -#include <sys/malloc.h>
> #include <sys/evcount.h>
> #include <sys/gpio.h>
>
> -#include <arm/cpufunc.h>
> -
> #include <machine/bus.h>
> #include <machine/fdt.h>
> #include <machine/intr.h>
>
> #include <dev/gpio/gpiovar.h>
>
> -#include <armv7/armv7/armv7var.h>
> -#include <armv7/omap/prcmvar.h>
> #include <armv7/omap/omgpiovar.h>
>
> #include <dev/ofw/fdt.h>
> #include <dev/ofw/openfirm.h>
> +#include <dev/ofw/ofw_clock.h>
> #include <dev/ofw/ofw_gpio.h>
>
> #include "gpio.h"
> @@ -259,22 +254,12 @@ omgpio_attach(struct device *parent, str
> struct omgpio_softc *sc = (struct omgpio_softc *) self;
> struct gpiobus_attach_args gba;
> u_int32_t rev;
> - int i, len, unit;
> - char hwmods[64];
> + int i;
>
> if (faa->fa_nreg < 1)
> return;
>
> - unit = -1;
> - if ((len = OF_getprop(faa->fa_node, "ti,hwmods", hwmods,
> - sizeof(hwmods))) == 6) {
> - if ((strncmp(hwmods, "gpio", 4) == 0) &&
> - (hwmods[4] > '0') && (hwmods[4] <= '9'))
> - unit = hwmods[4] - '1';
> - }
> -
> - if (unit != -1)
> - prcm_enablemodule(PRCM_GPIO0 + unit);
> + clock_enable_all(faa->fa_node);
>
> sc->sc_node = faa->fa_node;
> sc->sc_iot = faa->fa_iot;
> Index: ommmc.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/armv7/omap/ommmc.c,v
> retrieving revision 1.38
> diff -u -p -r1.38 ommmc.c
> --- ommmc.c 19 Jan 2021 18:04:43 -0000 1.38
> +++ ommmc.c 24 Mar 2021 13:46:44 -0000
> @@ -19,11 +19,8 @@
>
> /* Omap SD/MMC support derived from /sys/dev/sdmmc/sdhc.c */
>
> -
> #include <sys/param.h>
> #include <sys/device.h>
> -#include <sys/kernel.h>
> -#include <sys/malloc.h>
> #include <sys/systm.h>
> #include <machine/bus.h>
> #include <machine/fdt.h>
> @@ -31,10 +28,8 @@
> #include <dev/sdmmc/sdmmcchip.h>
> #include <dev/sdmmc/sdmmcvar.h>
>
> -#include <armv7/armv7/armv7var.h>
> -#include <armv7/omap/prcmvar.h>
> -
> #include <dev/ofw/openfirm.h>
> +#include <dev/ofw/ofw_clock.h>
> #include <dev/ofw/ofw_gpio.h>
> #include <dev/ofw/ofw_pinctrl.h>
> #include <dev/ofw/fdt.h>
> @@ -304,8 +299,6 @@ ommmc_attach(struct device *parent, stru
> struct sdmmcbus_attach_args saa;
> uint32_t caps, width;
> uint32_t addr, size;
> - int len, unit;
> - char hwmods[128];
>
> if (faa->fa_nreg < 1)
> return;
> @@ -322,14 +315,6 @@ ommmc_attach(struct device *parent, stru
> size = faa->fa_reg[0].size;
> }
>
> - unit = -1;
> - if ((len = OF_getprop(faa->fa_node, "ti,hwmods", hwmods,
> - sizeof(hwmods))) == 5) {
> - if (!strncmp(hwmods, "mmc", 3) &&
> - (hwmods[3] > '0') && (hwmods[3] <= '9'))
> - unit = hwmods[3] - '1';
> - }
> -
> sc->sc_iot = faa->fa_iot;
> if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh))
> panic("%s: bus_space_map failed!", __func__);
> @@ -339,9 +324,8 @@ ommmc_attach(struct device *parent, stru
>
> pinctrl_byname(faa->fa_node, "default");
>
> - /* Enable ICLKEN, FCLKEN? */
> - if (unit != -1)
> - prcm_enablemodule(PRCM_MMC0 + unit);
> + clock_enable_all(faa->fa_node);
> + reset_deassert_all(faa->fa_node);
>
> sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_SDMMC,
> ommmc_intr, sc, DEVNAME(sc));
> @@ -450,9 +434,6 @@ ommmc_attach(struct device *parent, stru
> saa.caps |= SMC_CAPS_MMC_HIGHSPEED | SMC_CAPS_SD_HIGHSPEED;
> }
> width = OF_getpropint(faa->fa_node, "bus-width", 1);
> - /* with bbb emmc width > 1 ommmc_wait_intr MMCHS_STAT_CC times out */
> - if (unit > 0)
> - width = 1;
> if (width >= 8)
> saa.caps |= SMC_CAPS_8BIT_MODE;
> if (width >= 4)
> Index: omrng.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/armv7/omap/omrng.c,v
> retrieving revision 1.2
> diff -u -p -r1.2 omrng.c
> --- omrng.c 29 May 2020 04:42:23 -0000 1.2
> +++ omrng.c 24 Mar 2021 13:46:44 -0000
> @@ -24,10 +24,9 @@
> #include <machine/fdt.h>
>
> #include <dev/ofw/openfirm.h>
> +#include <dev/ofw/ofw_clock.h>
> #include <dev/ofw/fdt.h>
>
> -#include <armv7/omap/prcmvar.h>
> -
> /* Registers */
> #define RNG_OUTPUT0 0x0000
> #define RNG_OUTPUT1 0x0004
> @@ -110,8 +109,7 @@ omrng_attach(struct device *parent, stru
>
> printf("\n");
>
> - if (OF_getproplen(faa->fa_node, "ti,hwmods") > 0)
> - prcm_enablemodule(PRCM_RNG);
> + clock_enable_all(faa->fa_node);
>
> /* Configure and enable the RNG. */
> HWRITE4(sc, RNG_CONFIG, 0x21 << RNG_CONFIG_MIN_CYCLES_SHIFT |
> Index: ti_iic.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/armv7/omap/ti_iic.c,v
> retrieving revision 1.13
> diff -u -p -r1.13 ti_iic.c
> --- ti_iic.c 10 Apr 2020 22:02:45 -0000 1.13
> +++ ti_iic.c 24 Mar 2021 13:46:44 -0000
> @@ -50,11 +50,9 @@
> * SUCH DAMAGE.
> */
>
> -#include <sys/cdefs.h>
> #include <sys/param.h>
> #include <sys/systm.h>
> #include <sys/device.h>
> -#include <sys/kernel.h>
> #include <sys/rwlock.h>
>
> #include <machine/bus.h>
> @@ -63,12 +61,11 @@
>
> #include <dev/i2c/i2cvar.h>
>
> -#include <armv7/armv7/armv7var.h>
> -#include <armv7/omap/prcmvar.h>
> #include <armv7/omap/ti_iicreg.h>
>
> #include <dev/ofw/openfirm.h>
> #include <dev/ofw/ofw_pinctrl.h>
> +#include <dev/ofw/ofw_clock.h>
> #include <dev/ofw/fdt.h>
>
> #ifndef AM335X_I2C_SLAVE_ADDR
> @@ -165,8 +162,6 @@ ti_iic_attach(struct device *parent, str
> struct fdt_attach_args *faa = aux;
> struct i2cbus_attach_args iba;
> uint16_t rev;
> - int unit, len;
> - char hwmods[128];
>
> if (faa->fa_nreg < 1)
> return;
> @@ -174,14 +169,6 @@ ti_iic_attach(struct device *parent, str
> sc->sc_iot = faa->fa_iot;
> sc->sc_node = faa->fa_node;
>
> - unit = -1;
> - if ((len = OF_getprop(faa->fa_node, "ti,hwmods", hwmods,
> - sizeof(hwmods))) == 5) {
> - if (!strncmp(hwmods, "i2c", 3) &&
> - (hwmods[3] > '0') && (hwmods[3] <= '9'))
> - unit = hwmods[3] - '1';
> - }
> -
> rw_init(&sc->sc_buslock, "tiiilk");
>
> sc->sc_rxthres = sc->sc_txthres = 4;
> @@ -195,8 +182,7 @@ ti_iic_attach(struct device *parent, str
> sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_NET,
> ti_iic_intr, sc, DEVNAME(sc));
>
> - if (unit != -1)
> - prcm_enablemodule(PRCM_I2C0 + unit);
> + clock_enable_all(faa->fa_node);
>
> rev = I2C_READ_REG(sc, AM335X_I2C_REVNB_LO);
> printf(" rev %d.%d\n",
>
>
