On Tue, May 19, 2015 at 10:49 AM, Slichter, Daniel H. <[email protected]> wrote: > The new DDS chips (AD9914) normally operate with a 32-bit FTW, which gives > them 0.8 Hz resolution in frequency with a 3.5 GHz clock. The chip is > capable of operating in a special mode called "programmable modulus mode", > which allows considerably finer resolution and also allows for the > possibility of exact frequency synthesis (see pp.17-18 of the datasheet for > details). > > What I am proposing below is that: > 1) people in the group do want frequency resolution finer than 0.8 Hz for > some applications, so we should enable the programmable modulus mode. > 2) we can have ARTIQ use this mode in a very simple way that doesn't allow > for exact frequency synthesis but just increases the effective FTW to 63 > bits, which gives ~400 pHz (picohertz) frequency resolution. I am imagining > that this level of frequency error is acceptable to everyone, right?
This mode can represent many rational frequencies but is certainly not "exact". Agreeing on 0.2 nHz (!) is seemingly easy. But either we abandon profile mode, data modulation and phase/amplitude and frequency ramps or you need to specify at what level and how you want to switch between these mutually exclusive modes. Also people have to determine whether the programming pattern that we implemented is fast enough (and will be with the additional 4 writes of the numerator) or in need of optimization. -- Robert Jordens. _______________________________________________ ARTIQ mailing list https://ssl.serverraum.org/lists/listinfo/artiq
