To expand, the VADJ rail supplies the output stages for the KC705 I/O banks 
connected to the FMC connectors, so if you want to drive things using LVCMOS or 
LVTTL 3.3V logic, you will have to program the VADJ rail to supply the 
necessary voltage.  It’s very straightforward; instructions are on the ARTIQ 
manual site below.

> -----Original Message-----
> From: ARTIQ [mailto:artiq-boun...@lists.m-labs.hk] On Behalf Of Robert
> Jördens
> Sent: Monday, September 19, 2016 4:57 PM
> To: Jonathan Mizrahi <jmizr...@umd.edu>
> Cc: artiq@lists.m-labs.hk
> Subject: Re: [ARTIQ] 3.3 V I/O on kc705
> 
> On Mon, Sep 19, 2016 at 9:36 PM, Jonathan Mizrahi <jmizr...@umd.edu>
> wrote:
> > see LVTTL IOStandards, which means they're already operating at 3.3 V.
> > This is why I'm confused about what I need to do to work at 3.3 V off
> > the FMC connector.
> 
> https://m-labs.hk/artiq/manual-release-2/core_device.html#vadj
> 
> --
> Robert Jördens.
> _______________________________________________
> ARTIQ mailing list
> https://ssl.serverraum.org/lists/listinfo/artiq
_______________________________________________
ARTIQ mailing list
https://ssl.serverraum.org/lists/listinfo/artiq

Reply via email to