Has M-Labs tested SAWG on Sayma since the DRAM, Ethernet, gateware bug patching in recent months?
On Tue, Jan 23, 2018 at 2:43 AM, Sébastien Bourdeauducq via ARTIQ < artiq@lists.m-labs.hk> wrote: > Hi, > > We are pleased to announce that the ARTIQ SAWG is now working on the Sayma > board. See the attached scope screenshot! > > There are still many rough edges but we are getting there. > > Steps to reproduce: > 0) We assume you have a Linux machine, Linux skills, and the full ARTIQ > development environment installed (Vivado, Rust, etc.). We will make conda > packages later. See: > https://m-labs.hk/artiq/manual-master/developing.html > > 1) Since the HMC830 usually malfunctions, bypass it by applying the > attached patch to the firmware. > > 2) Compile everything: > ./artiq/gateware/targets/sayma_rtm.py > ./artiq/gateware/targets/sayma_amc.py > Be patient: Vivado compilation time is Ultrascaled. > > 3) Since we bypassed the HMC830, feed a 1.2GHz clock directly into the > DAC_CLK_P SMP connector in the RTM. Put a 50R resistor across the DAC_CLK_N > SMP connector. Or use a balun if you have one (but the single-ended mode is > explicitly supported by the clock chip). > > 4) Flash the board: > artiq_flash.py -t sayma_amc --srcbuild misoc_standalone_sayma_amc > Do not put the board into a µTCA crate, as it wouldn't get correctly > powered due to a work-in-progress problem. Use the ATX connector instead. > > 5) Since Ethernet doesn't work yet, the kernel will be loaded as an "idle > kernel" through the flash. Run: > > cd artiq/examples/sayma > artiq_compile repository/demo.py > artiq_mkfs -f idle_kernel repository/demo.elf sawg.config > artiq_flash -t sayma_amc -f sawg.config proxy storage start > > (We've made progress on the Ethernet front, and reception of packets now > works; transmission appears to be a PHY configuration problem which is > being investigated). > > 6) Look at the boot messages on the serial console (first FTDI non-JTAG > channel, 115200bps, you can use flterm from MiSoC). It should block during > the initialization of the AMC/RTM bridge. > > 7) Since automatic RTM FPGA loading is not implemented yet, load the RTM > FPGA manually with the attached OpenOCD script and: > openocd -f sayma_new.cfg -c "pld load 0 artiq_sayma_rtm/top.bit; exit" > > 8) Look at the serial console again. Loading the RTM FPGA should have > unlocked the boot process and the board should initialize the HMC7043 and > the DACs, run PRBS tests, and finally your kernel. > > 9) Observe RF with a scope on the two outputs of a BaseMod (Allaki) in AFE > Channel 1. > By modifying the kernel and then recompiling and flashing it as in step 5, > you should be able to use the other channels as well, and generate other > waveforms. > > > _______________________________________________ > ARTIQ mailing list > https://ssl.serverraum.org/lists/listinfo/artiq > >
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