From: Tom Marchant <[email protected]>
Date: Friday, 16 July 2010 3:48


>On Thu, 15 Jul 2010 11:25:06 +1000, robin wrote:
>>
>>It's possible in the s/390 architecture to trap (inhibit) non-priveleged
>>instructions, using EX to execute every instruction [except, of course,
>>EX itself].  The overheads are not "an order of magnitude", but are
>>not trivial either.
>
>I agree that if your intention is to single step an entire program it can be
>done using EX.  In order to do so in a general way, without any limitations
>on the target code, several things must be done.
>
>For each instruction to be executed, the instruction length must be
>determined so that the "virtual PSW" can be updated.
>
>The instruction to be executed must be examined to determine whether it
>makes sense to use it as a target of an execute instruction.

That has already been covered, and I specifically cited EX itself.

>  Aside from
>execute type instructions (EX and EXRL), instructions such as BC, BRC, BASM
>and BASSM need special attention.  When they are executed and the branch is
>taken, the PSW address is updated.
>
>The instruction to be executed must be decoded enough to determine what
>registers will be used and ensure that the registers have the correct values
>that will be needed by the program.  This is necessary because the
>interpreter will require the use of at least two registers.  One to point to
>the instruction to be executed and another to point to an area of storage
>where it can store data that it needs.  If nothing else, it needs a place to
>store the value that the user's program expects in the register used to
>address the interpreted instruction.

As I mentioned befiore, instructions are not "interpreted".
They are (were) executed by the processor "as is where is".

With exceptions, as already mentioned.

>All of this requires many instructions to be processed for every instruction
>to be executed.  And, IIRC, execute is an expensive instruction.  That's why
>I said that the target program would run an order of magnitude slower.  Of
>course, if you can be sure that there is be a register that will never used
>by the target code, the task is much simpler.


Executing instructions via EX is a lot faster than simulation,
simply because the no code is required to be executed to
carry out the operation; instructions like AE, ME, TR, etc,
require code that is often implemented in the form of a subroutine.

And IIRC  EX was not an expensive instruction.

>Still, I think assembler code interpreted in this manner would perform an
>order of magnitude better than the usual method of modifying the storage
>after each instruction to be executed so that a program interruption or an
>SVC interruption occurs after every instruction.  All of the same work must
>be done when using the interrupt method.  In addition, every instruction
>results in an interruption and the cost of the FLIH must be factored in.

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