From: "Tony Harminc" <[email protected]> Sent: Thursday, 9 September 2010 7:14 AM
The relevant part of the zArch POO puts it this way: "In forming the intermediate sum, the base address and index are treated as 64-bit binary integers. A 12-bit displacement is treated as a 12-bit unsigned binary integer, and 52 zero bits are appended on the left. A 20-bit displacement is treated as a 20-bit signed binary integer, and 44 bits equal to the sign bit are appended on the left. The three are added as 64-bit binary numbers, ignoring overflow." If you prefer the earlier 32-bit version from the ESA/390 POO, it goes like this: "In forming the intermediate sum, the base address and index are treated as 32-bit binary integers. The displacement is similarly treated as a 12-bit unsigned binary integer, and 20 zero bits are appended on the left. The three are added as 32-bit binary numbers, ignoring overflow." The result is the same, of course: subtraction.
Subtraction? Please read what you quoted :- It says "ADDED". (emphasis added) If we go back to an even earlier manual, we see, for RX instructions :- "To obtain the address of the second operand, the contents of the "general registers specified by X2 and B2 are ADDED to the D2 field." (emphasis added). Any textbook will tell you the same thing -- for example, see Rudd, p. p. 165-166.
