On Mon, 13 Sep 2010 00:11:43 +0200, Binyamin Dissen
<[email protected]> wrote:

>On Sun, 12 Sep 2010 17:53:13 -0400 "Justin R. Bendich"
><[email protected]> wrote:
>
>:>         LA    R1,256           <- Line 1
>:>         USING 256,R1           <- Line 2
>:>         LA    R3,512(R2)       <- Line 3
>
>:>The thread has been that, because of line 2, the assembler will
>:>generate line 3 as follows:
>
>:>   4132 1100            LA    R3,512(R2)
>
>Could be.

Right now, i have access neither to a mainframe nor to any cross-assemblers.
They might do different things...

>
>:>If what i really want is for R3 to contain R2 + 512 (subject to
>:>addressing-mode constraints, as usual), does this mean that i
>:>really should be coding either
>
>:>         LA    R3,512(R2,)      <- Variant 2
>
>:>or
>
>:>         LA    R3,512(,R2)      <- Variant 3
>
>:>?
>
>The latter, as the assembler will not insert an index register.

So, you're saying that, in Variant 2, it could fill in the missing
base register if i don't explicitly specify it as 0?

>
>:>Note that these instructions do not always do the same thing.
>:>In AR mode, Variant 2 will set AR3 to zero, whereas Variant 3
>:>will copy AR2 to AR3.
>
>Neither will alter ARs. LAE would.

OOPS!!!

Sorry. I will remember that.

OK. So, for the sake of argument, let's replace all LAs with LAEs.
Then, if you want the behavior of Variant 2, do you have to explicitly
specify zero for the base register?

Justin

>
>--
>Binyamin Dissen <[email protected]>
>http://www.dissensoftware.com
>
>Director, Dissen Software, Bar & Grill - Israel
>
>
>Should you use the mailblocks package and expect a response from me,
>you should preauthorize the dissensoftware.com domain.
>
>I very rarely bother responding to challenge/response systems,
>especially those from irresponsible companies.

Reply via email to