On 4/11/2012 2:27 AM, Martin Packer wrote:
Trashing the I Cache is still very much a concern.
However, in the case posed to the group (branching around a constant to be loaded into a register), the "data" is not being modified. Though not ideal, it's perfectly OK to have instructions and constants in the same cache line. Multiple copies of the line can be loaded simultaneously "read-only" into both I-cache and D-cache on multiple processors and perform well. However, if you UPDATE the line, two things will happen as I understand things: a) all copies of that line will be purged from D-cache on all 'other' processors so that the 'current' processor can exclusively lock/update the line and b) the line will be purged from I-cache on all processors forcing the processor pipeline to go back to an earlier point in instruction fetch processing to re-fetch the line -- bad news. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 [email protected] http://www.phoenixsoftware.com/
