I just used a null loop, with JCTG starting at zero. This was to demonstrate to CICS support that an AICA abend from an AMODE=64 program cannot get hold of 64-bit abending registers via ASSIGN ASRAREGS64, but can get the bottom 32-bits of the registers via ASSIGN ASRAREGS.
Robert Ngan CSC Financial Services Group IBM Mainframe Assembler List <[email protected]> wrote on 2014/03/10 09:37:08: > From: Ian <[email protected]> > To: [email protected] > Date: 2014/03/10 09:39 > Subject: CPU Kill exit testing > Sent by: IBM Mainframe Assembler List <[email protected]> > > Hi, > > I'm testing a CPU kill exit in CICS. > > What CPU intensive instruction can be used in a BCT to test CPU time > limits? > > Thanks > > -- > Ian > http://www.cicsworld.com
