> > Response from hardware designer: > > > > Here are some thoughts on the best way to zero a register. > > > > First, on the z196 and prior generations, all of the common > > instructions for zeroing a register are actually executed in the > > fixed-point execution unit. Starting with the zEC12 generation > > the following instructions are actually "executed" in the > > register renaming stage of the pipeline (where "R" is the > > same register number for a given instruction): XR R,R; SR R,R; > > SLR R,R; LA R,0(0,0); LHI R,0 (plus other small constant values); > > LGHI R,0 (plus other small constant values); SGR R,R; SLGR R,R; > > XGR R,R; IIHF R,0; IILF R,0. > > > > On the z196 and earlier processors, since they are actually > > executed, use of an XR or SR may set up an unnecessary register > > dependency. For example: > > .... > > AL 5,MEM1 Using GR5 for some prior calculation > > ST 5,MEM2 > > ... > > XR 5,5 This instruction is dependent on the AL > > .... > > So although the XR will zero the register, regardless of its > > prior value, it still appears to be dependent on the AL so > > it can not execute early. > > I would say that XR is dependent upon the ST instruction, > because it cannot execute until ST has finished with register 5. > > > Other points of interest...the XR/SR/SLR are 2-byte > > instructions so they have a smaller instruction footprint, but > > this is a second or third order performance effect in most > > cases. The IILF/IIHF are 6 byte instructions, so there would > > be little reason to use them. > > > > To conclude, the LHI and LGHI are probably the best overall > > instructions for clearing a register on any generation processor. > > Referring to your 3-instruction example directly above, > LHI is no better than SR, for it cannot be executed until the > ST has completed. The shortest instructions are therefore > to be preferred.
Perhaps I did not identify my information source clearly enough. The hardware designer who provided the response I quoted is Tim Slegel, IBM Distinquished Engineer, a lead hardware processor designer for several generations of IBM mainframe machines. It seems unlikely that you would be more expert in the internal implementation of these machines than he is. Jim Mulder z/OS System Test IBM Corp. Poughkeepsie, NY
