On 6 May 2015 at 10:20, Tom Marchant <[email protected]> wrote: > In fact, I could imagine a CPU that would > recognize a cache miss, initiate the fetch from memory and halt the > instruction. In that case, the "CPU-determined" number of bytes would > not necessarily be a fixed number.
This is explicitly recognized in the PoO. "The amount of processing that results in the setting of condition code 3 is determined by the CPU on the basis of improving system performance, and it may be a different amount each time the instruction is executed." But of course certain instructions guarantee a minimum amount of processing. Also of note: "Completion with the setting of condition code 3 permits interruptions to occur. Depending on the model and the instruction, condition code 3 may or may not be set when there is not a need for an interruption." Tony H.
