On 2015-10-15, at 10:27, John McKown wrote: >>> >>> Going beyond that, I have often wanted a "execute next instruction on >>> condition". I.e. check the CC value, like a branch does, if the condition >>> is TRUE, then execute the next instruction, otherwise skip it. ... >>> >> Data General NOVA. The CC was not saved in the PSW, but every RR >> instruction contained a CC mask governing skipping the next instruction. >> Plus one flag bit suppressing loading the destination register when >> the programmer intended only to test CC. Any RR instruction with >> Don't Store, Never Skip could be used as a no-op. > > I got the idea after reading up on the ARM architecture. Many tablets, > smartphones, and other gizmos use ARM. I think this usage is based on RISC > research. > Such a skip as opposed to a branch is probably less strain on branch prediction, pipelining, AGL, ... But I thought RISC deferred such logic to optimizing compilers or dynamic recompilation.
I suspect FORTRAN's 3-way IF was a reflection of a hardware instruction of the IBM 70* series (as was SIGNF()). John Gilmore has lamented the lack of 3-way IF in more recent languages, requiring the programmer either to use a temp variable or to repeat a complicated expression in two successive IFs. I believe that's what optimizing compilers are for. -- gil
