Thanks for your extended response. I agree that it is unlikely BSA will be any part of my resolution.

I was testing ways to avoid running in key 0 while accessing and updating memory in different keys. I saw that BSA could change the PKM and so was testing how it worked. This experiment was with key 9 because I knew it was available for CICS support and was curious if it had fetch access to key 8. It doesn't but then I wanted to know how BSA worked.

In response to your and John's more extensive inquiries into comments on my larger goal: My larger problem is having to update key n memory (where n is 1 to 7) and in the same routine access and update key 8 or key 9 memory efficiently. To minimize integrity exposures, I'd prefer not to run in key 0 except when the rare update to key 0 CSA is required. When I started to investigate this change the first hurdle was that user key storage is by default fetch protected so I could not run in key n while updating key n memory and still access key 8 memory. This is a modification to existing code from when the key n memory was key 9, so the accesses and updates to key n and user key are interleaved.

Regards, Gary


Gary Weinhold Senior Application Architect DATAKINETICS | Data Performance & Optimization
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On 2015-12-16 08:16, Peter Relson wrote:
It is quite likely case that you do not want to use BSA. BSA was created
to help solve a problem whose nature I no longer specifically remember,
but I don't think it is anything like yours. I suggest that you look
elsewhere.

You are authorized so you have a lot of choices with respect to using
different keys. Are you trying to avoid running in supervisor state?
If you're just trying to switch (back and forth) between TCB key and key 9
you don't need any authorization. z/OS has set up the jobstep task's PKM
with the TCB key plus key 9 represented. SPKA is semi-privileged, so this
setup means that SPKA will work fine to switch back and forth between TCB
key and key 9.

The only reason listed for a Special Operation exception for BSA is if
R6 is non-zero when returning to base authority.
That is not what is documented. What is documented is:
R2 must be zero; otherwise, a special-operation exception is recognized.

The PoOp is very precise. It needs to be followed with similar precision.
R2 refers to the specification in the instruction, not the contents of the
register identified by that specification.
PoOp goes on to say

The initial contents of general registers R1 and R2 are ignored.

Thus you would want BSA R5,0 (or BSA anyreg,0)

Peter Relson
z/OS Core Technology Design

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