The combination of a 4-bit register field and using the same registers for
accumulators,
base registers and index registers.
4 bit storage protect keys
No address translation. Maybe paging was too expensive, but surely block
relocation
was doable.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
________________________________________
From: IBM Mainframe Assembler List <[email protected]> on behalf
of Charles Mills <[email protected]>
Sent: Monday, December 4, 2017 5:55 PM
To: [email protected]
Subject: Re: Access registers
I believe someone (Harlan Mills? Fred Brooks?) said that he felt the only (or
most significant?) *error* in the System 360 design was the 24- rather than 31-
or 32-bit addressing.
Anyone who has wrestled with legacy control blocks in the modern era would
probably agree.
Charles
-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]] On
Behalf Of Dan Greiner
Sent: Monday, December 4, 2017 2:24 PM
To: [email protected]
Subject: Re: Access registers
Mr. McKown writes, "That book [the PoO] will never make the "best seller" list,
as excellent as it is." Having been the editor of that document for the past
decade, I fully concur. Like "War and Peace," there's lots of characters but
not much of a plot .
IBM mainframes have a long history of running into the limits of an addressing
capabilities, and then dodging the issue by expanding into address spaces. The
original example is virtual memory. When 24-bit virtual addressing became a
limitation, the dual-address-space facility was announced (circa 1981). When
the 31-bit virtual address of 370/XA became a limitation, address spaces were
announced (circa 1989). Fortunately, we haven't yet run into the 64-bit virtual
address space representing a limitation, but stay tuned ...
The original architects of virtual memory touted its capability of
over-committing real memory ... i.e., you can stuff 10 megabytes of data into a
5 megabyte bag; this is still reflected in the introductory discussion of
dynamic address translation (DAT) in Chapter 3 of the PoO. However, I think the
more important attribute of DAT is to segregate memory (both instructions and
operands) so that the O/S components, subsystems, applications, and data spaces
are fenced off from each other by hardware means. This is where access
registers are the key.
With appropriate OS set up, an application program could have addressability of
up to 2,048 address spaces, and switch between those spaces without any
supervisor assistance. With 64-bit addressing, that means that the program
could conceptually have addressability to 2**75 bytes of data (good luck
finding enough auxiliary storage to back that up though).
I did a presentation at SHARE in San Jose in 2008 that illustrates the
mechanisms of DAT and ART. Check out session S8192 from SHARE 111 (August
2008) ... it has lots of speaker notes describing the slides. Unfortunately,
it also has lots of animation which got lost in the PDF versions that SHARE
archived back then. If you want a fully-animated PowerPoint, contact me
outside of this bulletin board.
