I know, it was an e-mail, not a white paper. One type of optimization is simply arranging the instructions better. Along with the ARCH parameter there is a TUNE parameter.
> programs that may never get compiled again And for those, IBM has the Automatic Binary Optimizer. https://www.ibm.com/us-en/marketplace/improved-cobol-performance Charles -----Original Message----- From: IBM Mainframe Assembler List [mailto:[email protected]] On Behalf Of Rob van der Heij Sent: Wednesday, January 24, 2018 12:24 PM To: [email protected] Subject: Re: Fair comparison C vs HLASM On 24 January 2018 at 18:33, Charles Mills <[email protected]> wrote: > > The reality is that cycle times are not getting any faster. A z14 does > not execute z10 machine instructions significantly (any?) faster than a z10. > The second sentence does not follow from the first one. While a single instruction may take (in many cases) the same number of clock cycles, improved pipeline and out-of-order execution with deeper and wider cache makes that a series of instructions often does run quicker than before. Workloads that just didn't fit in cache anymore before may well fit now. I'm frequently surprised by the number of extra instructions that you can sneak into the code without slowing it down. Add to that the SMT support for specialty engines. One of the reasons for investing in those aspects of a CPU is that a fair amount of the instructions executedare in programs that may never get compiled again. Would be interesting to know which percentage of the executed instructions are plain old S/370 ones... Rob
