The contents of R0 is irrelevant to forming the effective address of an RS or RX instruction. the contents of the prefix register are only relevant for real addresses.
Now,, if you're running DAT off and you use an instruction that takes an address from a register, e.g., MVCL, then it is subject to prefixing. But even there it's in terms of the storage assigned to the LPAR. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List <[email protected]> on behalf of Steve Thompson <[email protected]> Sent: Wednesday, November 6, 2019 1:09 PM To: [email protected] Subject: Re: Questionable Instructions in Obtaining EAX documentation So what happens when R0 happens to contain the same value as the prefix Reg of the CPU that handles this code? Would that be how one gets to "relative" 0 in this particular LPAR? (Absolute address 0 is owned by the Hypervisor if I understand how IBM implemented PR/SM). Regards, Steve Thompson On 11/6/19 1:01 PM, Steve Smith wrote: > Register 0 cannot be used as a base or index register. This is because 0 > in the base or index register field or an instruction means "no register". > The assembler has always allowed the specification of 0 for either to > satisfy the people who just like to code default stuff. > > Clearing a register before LH strongly implies the coder doesn't know what > LH does. > > The L R4,AXVAL should be LH. > > sas > e address of an RS or RX instruction.
