> Do they properly set CC? Absolutely! It's in the architecture. If SR 0,0 stopped setting the CC a thousand programs all around the world would instantly fail.
> Does setting CC possibly delay out-of-order execution of other instructions which may set or test CC? I believe so, at least sometimes. That is one of the two reasons why I prefer LHI. (The other being that one can equate the values: with LHI R15,Ret_Good it's pretty clear what is being done; with SR/XR R15,R15 not so much.) Charles -----Original Message----- From: IBM Mainframe Assembler List [mailto:[email protected]] On Behalf Of Paul Gilmartin Sent: Tuesday, August 11, 2020 8:45 AM To: [email protected] Subject: Re: Clearing a register On 2020-08-11, at 09:11:28, Jonathan Bradbury wrote: > > I forgot to add that these instruction never actually get executed, no exclusive-OR or subtraction is done. Instead the instruction decoder recognizes these cases and during register renaming which is part of out-of-order execution, they map the target register to one that has a constant value of 0 in it. It doesn't even take up an execution slot in the pipeline. Any subsequent instructions that depend on the 0 value will be able to execute without having to wait for the computation to be done. > Do they properly set CC? Does setting CC possibly delay out-of-order execution of other instructions which may set or test CC? -- gil
