> -----Original Message----- > From: IBM Mainframe Assembler List <ASSEMBLER- > [email protected]> On Behalf Of Seymour J Metz > Sent: 20 December 2020 17:12 > To: [email protected] > Subject: Re: S/360 emulation in PC/370 > > The 360/30, 360/40 and 360/50 had integrated channels, cycle stealing from > the CPU microcode. The channel-control unit-device structure was very > similar to that of the 7000 series and the 7030. When the S/360 came out, > channel I/O was the norm, and Interrupts go back to the 1950s. >
But its quite alien to those of a certain age brought up on 8 and 16-bit Microprocessors. The 6502 and 6800/09 only have memory IO. The 8080 and other family chips do have a separate IO space, but it uses the same data bus. Essentially its memory mapped IO. The fact that on S/360 a single IO can store information in multiple disparate locations. Things like the serial lines where you can see data arriving.... > Small machines like the 650 and 1401 had simpler I/O, but I don't recall > anything older than the PDP-11 that had memory-mapped I/O. > The Ferranti Pegasus I, a valve/tube computer dating from 1956 had memory mapped IO https://en.wikipedia.org/wiki/Ferranti_Pegasus there were two memory locations for input, and two for output. This allows "normal" binary IO where you send the binary value of the character, and numeric IO where the bottom 4 bits are interpreted as an integer and the corresponding characters 0-9 output or input The numeric output was necessary as they used a an odd character set for the teleprinters, not IA2. > > -- > Shmuel (Seymour J.) Metz > http://mason.gmu.edu/~smetz3 > Dave G4UGM
