The compiler has to know which register contains zero in order to generate the 
LR.

If the OP was asking about the MVHI then I understand the code but not what is 
curious about it.

I found it obvious that the first comma indicated the lack of an index 
register; it was the second comma and displacement that I thought was awkward. 
In assembler I would have expect just var, with R13 and 160 implied by an 
active USING and visible in the object code as D0A0, although 160(R13) would 
certainly be a legitimate alternative.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Assembler List [[email protected]] on behalf 
of Peter Relson [[email protected]]
Sent: Friday, November 12, 2021 9:04 AM
To: [email protected]
Subject: Re: Curious compiler optimization

<snip>
> When it needs zero, it merely copies it into anther
> register that it has allocated?

Yes, but why not just store the register that they know already contains
zero?
</snip>

Because they do not necessarily "know" that when the code is generated. It
might well be that the removal of the extra instructions and the
"knowledge" itself is an optimization, and the OP asked for no
optimization. So this is not a curious "optimization". It is a natural
non-optimization. Unless the OP's curiosity was about use of MVHI which,
as was pointed out, is fully correct.

I'd think that if you want decent code, you don't ask for no optimization.
If you do ask for no optimization, you get what you get. Maybe that helps
you learn how these compilers generate code. For example, the "initial"
pass of the code-gen for z system does not necessarily assume knowledge of
there being only 16 GRs available.

Regarding "ST   r0,var(,r13,160)"
I have no idea, but this is not assembler, it is pseudo-assembler. If they
don't document otherwise, it can be as "pseudo" as they choose. Maybe the
leading comma is to indicate that there is no index register. That's how
you'd code it in assembler (of course you'd have the "160" where "var"
is).

Peter Relson
z/OS Core Technology Design

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