Old nstructions that take register pairs in A24 and A31, e.g., CLCL, still take
register pairs in A64. Lots of instructions only operate on bits 32-63 even in
A64. The Grandé instructions operate on bits 0-63 even in A24 and A31. So it
very much depends on which instruction you're referring to. E.g.,
AR 32+32
AGR 64+64
CLCL pair+pair (32)
CLCLE pair+pair (32 or 64)
LA 32 or 64
LG 64
SLA 32
SLAG 64+64
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
________________________________________
From: IBM Mainframe Assembler List [[email protected]] on behalf
of Dave Clark [[email protected]]
Sent: Wednesday, January 19, 2022 1:44 PM
To: [email protected]
Subject: 64-bit registers (was: Unsigned Binary Formats)
"IBM Mainframe Assembler List" <[email protected]> wrote on
01/19/2022 01:00:07 PM:
> I'd suggest you clear the high-order word of R2 then use CVDG.
>
> Would that work for you?
OK, that brings up a question that I have not had to address
before this. Up till now I've used odd-even register pairs for 64-bit
operations. But I'm given to understand that all general registers are
actually 64-bit now instead of the traditional 32-bit. Is that correct?
So, 32-bit instructions just use the low order 32 bits of the general
purpose register and 64-bit instructions automatically use the full
register -- with no register "pairs" involved. Is that correct?
Sincerely,
Dave Clark
--
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3110 Kettering Boulevard
Dayton, Ohio 45439 USA
(937) 294-5331
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