I would code what's readable unless it's in a hot spot. If performance is an
issue and each version is too slow on one model then I might encapsulate the
alternate paths in a macro, but then there's the configuration control issue of
ensuring the right assembler options for each target.
Sexy instructions (MHO) include
CLM*
CUSE, if I'm reading the description correctly
EX*
FLOGR
LA[ANXO]*
LOC*
LPD
LPQ
LRV*
POPCNT
SEL*
STRV*
There's lot's of good stuff in the vector facility. Given OS support, the guard
and trap facilities might be sexy.
YMMV.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
________________________________________
From: IBM Mainframe Assembler List [[email protected]] on behalf
of Bob Raicer [[email protected]]
Sent: Friday, March 4, 2022 10:50 AM
To: [email protected]
Subject: Re: Fun with RXSBG
I have used similar logic to "round up" a length or address value
with the same architecturally integral constraints. In this old
code fragment GPR 15 contains the initial value to be adjusted.
Yes, the code needs to be tweaked for 64-bit values.
I guess if I hurt my head a bit I could use the ROTATE THEN *
SELECTED BITS instructions too ! Nifty (perhaps?)!
: DBLRND EQU B'111' A double-word length or
: * boundary rounding value.
: *
: LA R14,DBLRND(,0) Load a double-word rounding
: * value.
: *
: ALR R15,R14 Round up the initial value.
: *
: XR R14,R15 Obtain the rounded sum with
: * the rounding bits inverted.
: *
: NR R15,R14 Obtain the rounded value.
Just out of curiosity, are the various Rotate instructions all
implemented in hardware on all of the machine models where they
exist?
