Sent from my iPhone > On Apr 15, 2022, at 12:20 PM, Robin Vowels <[email protected]> wrote: > > On 2022-04-16 00:25, Tom Harper wrote: >> Well known. But the instruction I’m proposing has no registers >> involved > > Oh? How do you propose that such an instruction move > N bytes (where N is variable) without the value of N > being in a register?
As mentioned, R0. > >> (other than base displacement) and thus there is no way to >> restart the instruction to complete the process. >> So to avoid that, limiting it to 256 bytes removed that as an issue. >>>> On Apr 15, 2022, at 9:45 AM, Seymour J Metz <[email protected]> wrote: >>> You can have interruptability without an arbitrary length restriction; >>> CLCL and MVCL work just fine. All that you need is that the instruction be >>> resumeable and for the hardware/microcode/millicode to periodically check >>> for pending interrupts and update the registers as needed > >>> ________________________________________ >>> From: IBM Mainframe Assembler List [[email protected]] on >>> behalf of Robin Vowels [[email protected]] >>> Sent: Friday, April 15, 2022 5:08 AM >>> To: [email protected] >>> Subject: Re: Next instruction needed >>> ----- Original Message ----- >>> From: "Tom Harper" <[email protected]> >>> To: <[email protected]> >>> Sent: Friday, April 15, 2022 3:06 AM >>>> IMHO, the next instruction to add to z/Architecture would be an >>>> instruction to clear storage to >>>> zeros. >>>> Right now a number of methods are in widespread use, none of which are >>>> clean and simple. I mean, >>>> it’s been almost sixty years. >>>> MVCL takes three registers to set up beforehand; >>> So? Write yourself a macro. >>>> XC sets the condition code and is not variable length, and the overlapping >>>> MVC is a kluge >>> But it does the job well. >>>> and not variable length either. >>> Use Ex. >>>> An EX instruction is also a kluge. >>>> All you need is the address and length to accomplish this, preferably in >>>> two versions, >>>> one with an immediate operand for the length >>> Really?! A few lines ago, you were decrying XC and MVC because they have a >>> "fixed length". >>>> and another which uses, for example, a register, perhaps register zero. A >>>> long displacement would >>>> be a plus. >>> To avoid issues with interruptibility, the length would need to be limited >>> to 256 bytes. >>> What? Back to a limit of 256? what's the point of that? >>> MVCL will do as long as you want. >>>> I don’t think the length restriction would be an issue in most cases. >>> There's no point in having an instruction with a length restrictionof 256. >>>> Such an instruction might look like this: >>>> CLEAR FieldA >>>> Or >>>> LLGF R0,Varlen >>>> CLEARR >>> A macro reference would require one line. >>>> Similar instructions for compare logical and move would be nice as well. -------------------------------------------------------------------------------- This e-mail message, including any attachments, appended messages and the information contained therein, is for the sole use of the intended recipient(s). If you are not an intended recipient or have otherwise received this email message in error, any use, dissemination, distribution, review, storage or copying of this e-mail message and the information contained therein is strictly prohibited. If you are not an intended recipient, please contact the sender by reply e-mail and destroy all copies of this email message and do not otherwise utilize or retain this email message or any or all of the information contained therein. Although this email message and any attachments or appended messages are believed to be free of any virus or other defect that might affect any computer system into which it is received and opened, it is the responsibility of the recipient to ensure that it is virus free and no responsibility is accepted by the sender for any loss or damage arising in any way from its opening or use.
