Robert, I agree with Abe ... this is a clever use of VTM.
As to many vector instructions not setting the condition code, this seems to be a general trend in SIMD architecture. Rather than setting the CC, many instructions set conditional indications in a vector register which can be used to feed a VECTOR SELECT instruction to conditionally load results. This style of programming can significantly reduce branchy code to load one result versus another. As of the z15, this style of programming can also be applied to general registers with the SELECT and SELECT HIGH instructions.
