Thanks.
I assumed that by "Instructs the assembler to issue diagnostic message ASMA309W
when an operand is resolved to a baseless address and a base and displacement
is expected." it meant the generated instruction, not how the instruction was
coded. So I did wonder how the IBM macros were avoiding the warning.
This works for me...
-----Original Message-----
From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> On Behalf
Of Jonathan Scott
Sent: Wednesday, July 10, 2024 4:51 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Getting to CVT with FLAG(PAGE0)
To avoid ASMA309W when referencing a low storage location using
either a self-defining term (number) as the address or an
expression which resolves to an offset, code an explicit base
register of zero. For indexed instructions, IBM macros
typically also code an explicit zero index register as well just
to be clear.
Examples from SYS1.MACLIB:
L 15,CVTPTR(0,0)
L 15,X'10'(0,0)
L 15,PSATOLD-PSA(0,0)
Jonathan Scott, HLASM
IBM Hursley, UK
