Does that correlate to the actual processor, or only when it was added to HLASM?
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 עַם יִשְׂרָאֵל חַי נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר ________________________________________ From: IBM Mainframe Assembler List <[email protected]> on behalf of Jonathan Scott <[email protected]> Sent: Friday, October 24, 2025 8:39 AM To: [email protected] <[email protected]> Subject: Re: LOAD ON CONDITION External Message: Use Caution See the HLASM list of all supported instructions in the Programmer's Guide: https://www.ibm.com/docs/en/hla-and-tf/1.6.0?topic=instructions-table-all-supported It shows the range of OPTABLE levels which include each one, for example: Mnemonic Operands Extends Optables Fmt Opcd Flags Instruction LOCGHINP R,+I16 LOCGHI UNI,Z13- RIE EC46 LOAD HALFWORD IMMEDIATE ON CONDITION NOT PLUS (64←16) If the instruction was extended at some point, it shows separate definitions for each version of the instruction. That index was taken from my HLASM instruction set overview document, currently IBM internal only. I built the index table using the new OPTABLE names (which I added in APAR PH03536 in 2021) corresponding to the machine names (Z9 through Z17) rather than the old zSeries (ZS3 etc.) names, to make it easy to identify the hardware level. I had hoped to make the whole document available externally, but when I failed to find any simple solution that complied with the current corporate rules I eventually decided that it was sufficiently important that I should at least try to make the systematic instruction set information available in the Programmer's Guide, so I provided the writers with a simplified HTML version of the table that they used as a basis for copying and pasting into the documentation tools to add that new appendix. The overview document also has a separate section that lists a table of information for each OPTABLE level which gives the alternative OPTABLE names, the equivalent MACHINE names, the matching ARCH levels and the first z/OS release that prereqs that level. The MACHINE names include ARCH-n levels so the HLASM documentation of the OPTABLE and MACHINE options can be used to match those up. The z/OS prereqs are not so easy to map directly to hardware levels; z/OS documentation gives the requirements in terms of features, but not directly in terms of hardware levels, for example here: https://www.ibm.com/docs/en/zos/3.2.0?topic=system-identifying-server-requirements The HLASM instruction set overview document was created entirely from published information, so I had been hoping that the HLASM team could find a way to publish it externally. There are other topics in that document which could also be useful, such as an overview of common patterns in how opcode mnemonics are formed. Perhaps they could add something similar as an additional topic inserted within the appendix containing the index of supported instructions, or even better add the whole little book including the tables of instructions grouped by function. That would admittedly need a lot more work from the writers than the index. The internal version of that document has links from each mnemonic to the corresponding topic in an unofficial static HTML web version of Principles of Operation, but can be built instead in an "external" version without those links (where the links simply go in both directions between the first occurrence in the main text and the corresponding entry in the above index), so that alternative might be suitable for such a use as a separate document. But I think that information is of sufficient interest to Assembler programmers that it should really be merged into the Programmer's Guide. Jonathan Scott -----Original Message----- From: IBM Mainframe Assembler List <[email protected]> On Behalf Of Seymour J Metz Sent: 24 October 2025 11:53 To: [email protected] Subject: Re: LOAD ON CONDITION Is there a publicly available document that shows which model supports which feature? Or, equivalently, which architectural level supports which features? -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 עַם יִשְׂרָאֵל חַי נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר ________________________________________ From: IBM Mainframe Assembler List on behalf of Binyamin Dissen <[email protected]> Sent: Friday, October 24, 2025 4:21 AM To: [email protected] Subject: Re: LOAD ON CONDITION External Message: Use Caution On Thu, 23 Oct 2025 13:27:57 -0700 Ed Jaffe <[email protected]> wrote: :>I just coded this and it was kinda fun: :> :> LOCGHINP R6,1 Set to 1 if not positive What is the minimum zOS that requires the hardware? -- Binyamin Dissen http://secure-web.cisco.com/1hv-z2d2jKexViFOzfPK-dDl8gGb1K5diZexTZzK1oOgzsDu7dis5_XrlFnRFPCvAo3xLauADSEdK8nnzRb4XlpOEcJ_V9KLqwghHkZHwSW5dLWTwYbnuR2zUrLnHdJ5Lz3ab4sXZulD2RIPJ2J5SE-gU3XX37OFO55y0AEqqvJXsZdAUm91eOsz0LsiCjsem6s24Kpz-4paQYAihVTA6SbxN2wLLMvb5KfwFjnIqxH-jk3ec9DZ_mLOF18vvaw3i5wsfSJAMYDw2oHlcmU5xzas8QJmY0J8xdVfTEfx2RryaJqiKVk_TVB6aY8wPyQM-m-drBqHdfAxd0o3dJZjx0g0tsKrdTOeXkmwdK64-zSr8b7-04zI0951xj9PFQhgviNCfJ1DtM-OZo8bRlvIg1v6r49Nwod7op8ePPdmBzOo/http%3A%2F%2Fwww.dissensoftware.com Director, Dissen Software, Bar & Grill - Israel
