On 7/25/06, Shaw Terwilliger <[EMAIL PROTECTED]> wrote:
Andrew Kohlsmith wrote:
> What I was trying to state was that if you have two data streams that are
> solidly clocked but out of phase, you will not encounter any of these issues.
> If the clock period of either (or both) drifts then yes, you will run into
> trouble.
So it sounds like Asterisk can't synchronize the clocks between the
Digium and Sangoma boards (or any two PCI boards), and this just may be
a limitation of the T1-peripheral-on-PCI architecture. But it really
shouldn't matter because of the nature of my setup: errors caused by
timing mismatch between the PRI and channel banks won't cause noticeable
quality issues. Do I have it right?
--
Shaw Terwilliger < [EMAIL PROTECTED]>
SourceGear LLC
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--
Bruce
Nortex Networks
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