The cache-line flush size and the presence of CMOV are also useful
considerations.

The presence of the 8 MTRR's is significant... though probably less so
in our application.

-Philip

Kerem Erciyes wrote:
> I think Padlock support counts if you are trying to run OpenVPN or IPSEC.
> I have always run generic-pc type images on C3/C7 processors without
> any problem.
> (astlinux, m0n0wall, freenas, etc...)
>
> This is the C7 I tested the build with, it has SSE3 and RNG/ACE as
> most important differences.
> I also tested with a C3-2.
>
> processor     : 0
> vendor_id     : CentaurHauls
> cpu family    : 6
> model         : 10
> model name    : VIA Esther processor 1000MHz
> stepping      : 9
> cpu MHz               : 999.990
> cache size    : 128 KB
> fdiv_bug      : no
> hlt_bug               : no
> f00f_bug      : no
> coma_bug      : no
> fpu           : yes
> fpu_exception : yes
> cpuid level   : 1
> wp            : yes
> flags         : fpu vme de pse tsc msr pae mce apic sep mtrr pge cmov pat
> clflush acpi mmx fxsr sse sse2 pni est rng rng_en ace ace_en ace2
> ace2_en phe phe_en pmm pmm_en
> bogomips      : 2000.67
> clflush size  : 64
>
>
> On Tue, Feb 17, 2009 at 8:24 AM, Darrick Hartman
> <dhart...@djhsolutions.com> wrote:
>   
>> Kristian Kielhofner wrote:
>>     
>>> Looks like I've got a straight C3 on this machine:
>>>
>>> processor     : 0
>>> vendor_id     : CentaurHauls
>>> cpu family    : 6
>>> model         : 7
>>> model name    : VIA Samuel 2
>>> stepping      : 3
>>> cpu MHz               : 532.657
>>> cache size    : 64 KB
>>> fdiv_bug      : no
>>> hlt_bug               : no
>>> f00f_bug      : no
>>> coma_bug      : no
>>> fpu           : yes
>>> fpu_exception : yes
>>> cpuid level   : 1
>>> wp            : yes
>>> flags         : fpu de tsc msr cx8 mtrr pge mmx 3dnow
>>> bogomips      : 1066.16
>>> clflush size  : 32
>>>
>>> It seems unlikely this is causing my current issue but I would be
>>> interested to see what it would take to make a C3 image.  Also, I'm
>>> not sure I like the idea of three different sets of optimizations for
>>> different Via cores...
>>>       
>> The original VIA C3's gain nothing really over the generic image.  They
>> lack padlock support so I think we say C3 is really for Nehamiah and
>> newer and C7 is for well C7 processors.  Older processors should use the
>> generic image.
>>
>> Darrick
>>
>>     
>
>
>   


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