On Saturday 29 May 2010 02:39:38 Robert Brown wrote:
> + #define HIST_SIZE 100
> + unsigned char history[HIST_SIZE];
> ! #define OFFSET 1000
> ! if (skb->len > OFFSET + HIST_SIZE) {
> !   unsigned char *data = skb->data + OFFSET;
> !   if (memcmp(sc->history, data, HIST_SIZE) == 0) {
> !     ath5k_debug_dump_skb(sc, skb, "ZZ  ", 0);
> !   }
> !   memcpy(sc->history, data, HIST_SIZE);
> ! }

> My repeated packet detection hack is not perfect and given how often it
> fires it's probably showing TCP retransmissions or something similar
> that's totally normal..  

sure, you are only comparing bytes 1000-1100

> > very interesting! - there should be no packet reception during a reset!!!
> 
> I don't understand the reset code or the strategy it's implementing. 
> Naively, I would expect the reset code to take a lock and set a global "we
> are resetting" boolean,
> a flag that packet reception and transmission would check, but I don't
> think that's
> what's going on.

that might me a bad bug, then! i'll take a look.

> > also i am wondering why you have so many resets? (a review of the reset
> > code is the next thing we should do... it gives us trouble in other
> > places too...)
> 
> I have no clue about the frequency of resets.  I'll have to track down
> the reasons
> the chip can be reset and make the code print out why each reset happened.

that would be great. there are only a few places from where ath5k_reset() is 
called: ath5k_chan_set() or ath5k_init() which are configuration from 
mac80211/userspace. no need to worry about these. then it could be called from 
tasklet_calibrate() or the ath5k_reset_tasklet(). the tasklet is scheduled 
from ath5k_intr() on INTR_FATAL and INTR_RXORN (i sent a patch to remove the 
latter, but it hasn't been merged yet). and then there it could be called from 
ath5k_beacon_send() but in STA mode this doesnt apply. so most likely debug 
"intr" might show you.

have you tried "[PATCH] ath5k: disable ASPM"?

bruno
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