Yes, the EEPROM power calibration is implemented (oh excuse me, retyped from ath9k :). Any way power detector calibration can not be a reason, so plain (not per packet) power control is works as expected.
Best regards, Alex. On Mon, Jul 11, 2011 at 08:51:48PM +0530, Mohammed Shafi wrote: > On Mon, Jul 11, 2011 at 8:43 PM, Alex Hacker <hac...@epn.ru> wrote: > > On Mon, Jul 11, 2011 at 10:39:46PM +0800, Adrian Chadd wrote: > >> Have you just manually tried setting the relevant register using the > >> debug register read/write setup? > >> > > The TPC code is written aproximately 2 years ago in our propiertary > > AR5416/AR92xx driver > > which I currently adopt for AR9300. For AR5416/AR92xx chips it works fine. > > I think this module has to be taken into acoount ar9003_eeprom.c ? > > static int ar9003_hw_power_control_override(struct ath_hw *ah, > int frequency, > int *correction, > int *voltage, int *temperature) > > > > > > >> Or when you set bit 6 in 0x993c, bit 6 doesn't stay set? > > > > Yes, exactly the following are happens: > > REG_WRITE(0X993c,0x7f); > > REG_READ(0X993c) -> 0x00367044; > > REG_WRITE(0X993c,<somethin>); > > REG_READ(0X993c) -> 0x0000007f; > > > >> adrian > > Best regards, > > Alex. > > _______________________________________________ > > ath9k-devel mailing list > > ath9k-devel@lists.ath9k.org > > https://lists.ath9k.org/mailman/listinfo/ath9k-devel > > > > > > -- > shafi _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
