John Stimson Wrote: 
> The time that the data arrives on the input pin does not affect the time
> that the output pin switches.  The same clock signal is used to drive
> the clock input of every gate in the circuit, so the jitter between
> gates does not influence the timing of the signal at the final output
> -- only the jitter on the clock.
In a perfect world... This is how is supposed to work, and it does for
most part, but in practice a small amount of jitter/noise leaks through
and is difficult to get rid off. The same jitter pattern can be
recognised on the output, and it's not coming from the clock. 

John Stimson Wrote: 
> If jitter at the data input of a circuit influences the timing of the
> output data, then something is corrupting the clock -- excessive
> impedance in the power and ground planes, bad signal routing, poor
> grounding scheme, etc.
Remember that no design or no individual component is 100% perfect (a
flip-flop gate is not totally insensitive for noise and voltage
fluctuations, etc.). At these high switching frequencies the signals
don't look 'digital'.

It's easy to get rid off most jitter, but we heaven't seen or heard any
device yet which could get rid off all jitter that you put on its input
(I'm not talking about the clock). Several people and manufacturers
claim that they can, but each solution we've tried was another
dissapointment.
It must be possible though, in theory it seems so easy! It would be
nice if someone succeeded because it's this last bit of jitter which
seems to corrupt the sound the most.


-- 
void
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