seanadams Wrote: 
> I missed this the first time i read this thread.
> 
> When you say "grabbing the bits" - can you explain exactly how?
> 
> The DAC interface is not i2s, but left justified. It's the same thing
> but shifted right by one bit. In i2s the MSB comes one slot before the
> LRCK transition, but in left-justified it is immediately after.  So if
> you are reading the bus as i2s then it will be -6dB.
> 
> One tool which you may find helpful is the built-in full-scale sine
> wave test. Press "3" on the splash screen to activate. 
> 
> I have probably at one time or another used "i2s" as shorthand to
> describe the internal bus - sorry about that!


I soldered some wires from a ribbon cable (alternating ground and
signal) to the DAC side of the resistors going from the FPGA to the DAC
chip. I very quickly realized it was left justified rather than I2S,
this is easy to take into account since I use a CPLD to do the I2S to
DAC conversion (I'm using mono DAC chips so I have to "split the
stream")

I'll try the full scale sine tonight and see what happens.

The interesting thing in all this is that I get the same results using
softsqueeze. I have slimserver feding softsqueeze and get lower volume
than when I feed the file direct to the DAC using a USB to I2S
converter (this is under Linux so I don't have to worry about any of
the weird things Windows does). When I use squeezeslave which does NOT
implement a volume control I get the same volume as the file sent
directly to the DAC.

This seems to indicate that there is something in the implementation of
the volume control in the SB3 AND softsqueeze that is not going to full
volume when the volume control is not set to full.

John S.


-- 
JohnSwenson
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