Robin Bowes;137432 Wrote: 
> dpayeur wrote:
> > 
> > Please enlight me about all this. How could a bit of data be added
> or
> > dropped without screwing the whole sample in an audible way (even
> with
> > error correction).
> 
> Even though the data is digital, the transmission path is analogue.
> The
> digital signal is transmitted as changes in voltage. Interference to,
> or
> corruption of the changes in voltage means that it may not be possible
> to accurately decode the digital information at the receiver end. With
> SPDIF, the timing information is encoded in the signal - the clock is
> re-constructed using the gaps between samples as the timing guide. If
> that gap is out then the digital information can be wrong.
> 
> R.

So (Robin) would a reclocking/buffering DAC eliminate the inherent
problems with having to extract the timing from the SPDIF stream?


-- 
Phil Leigh
------------------------------------------------------------------------
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View this thread: http://forums.slimdevices.com/showthread.php?t=27452

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