Triode;147920 Wrote: 
> So in the case of adding a Superclock to improve performance - do we
> replace the PLL clock with a fixed phase clock?  I'm struggling to
> understand how that avoids compromising the data.

The crystal or crystal oscillator that drives the PLL is replaced with
a Superclock.  It is still a PLL driven by a fixed frequency clock, but
the jitter contribution of the clock itself is reduced.

Steve N.


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